The present invention is generally directed to capacitor structures for use in analog integrated circuit applications. More particularly, the present invention relates to the use of refractory metals as an intermediate layer so as to produce capacitors with precisely controlled electrical characteristics.
Analog integrated circuits are presently employed in a large number of applications. These include analog to digital conversion devices, digital to analog conversion devices, filters, modulators, decoders, and other similar devices. It is naturally desirable to construct such analog circuits on small integrated circuit chips which are generally compatible with VLSI (Very Large Scale Integration) design patterns and rules. While it has generally been found to be very difficult to incorporate inductive circuit elements in such devices, it has been found necessary and desirable to employ integrated capacitive devices. However, the small scale employed in such devices, has made it difficult to control device characteristics. At present, analog integrated circuit devices use either capacitor structures in which the conductive capacitor "plates" comprise polysilicon in each plate or a structure comprising a metal "plate" in combination with a doped silicon structure operating as the opposing plate. These metal-to-doped silicon devices do not form electrically isolated structures; thus they exhibit disadvantages in some circuit applications, particularly analog applications. Devices of this type also have large voltage coefficients. Another problem with both types of devices is that they exhibit lower electrical circuit "Q" values since silicon or polysilicon has higher resistivity, in comparison with metals, by a factor of about 100. Similarly, metal-to-polysilicon or doped silicon contacts exhibit higher impedances by a factor of about 100, in comparison with metal to metal contacts. Yet another major difficulty associated with some of these devices is that their capacitance value is determined either by an oxide cut in a thick interlevel dielectric or by the patterning of a second metal inside this cut. Since both these alternatives require patterning of a thick layer, the reproducibility and the accuracy of the resulting capacitance value is low.